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Cookie SettingsShamani, F. (2017). Design of intellectual property-based hardware blocks integrable with embedded RISC processors. Tampereen teknillinen yliopisto.
Chicago Style CitationShamani, Farid. Design of Intellectual Property-based Hardware Blocks Integrable with Embedded RISC Processors. Tampere: Tampereen teknillinen yliopisto, 2017.
MLA CitationShamani, Farid. Design of Intellectual Property-based Hardware Blocks Integrable with Embedded RISC Processors. Tampereen teknillinen yliopisto, 2017.
Harvard Style CitationShamani, F. 2017. Design of intellectual property-based hardware blocks integrable with embedded RISC processors. Tampere: Tampereen teknillinen yliopisto.
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