Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings

Hae kokoteksti

E-kirja

Azemard, Nadine , editor, 1963-

;

Svensson, Lars , editor, 1960-

Springer Berlin Heidelberg 2007. 1st ed. 2007.

Tallennettuna:

Ulkoasu

1 online resource (XIV, 586 p.)

Kieli

englanti

Huomautukset

Includes index.

Julkaisija

Berlin, Heidelberg : Springer Berlin Heidelberg, 2007.

Sarja

Theoretical Computer Science and General Issues, ISSN 2512-2029; 4644

Luokitus

dlc TK7874.75 .I584 2007

Dewey-luokitus

621.395

Aiheet

Logic design.

Microprocessors.

Computer architecture.

Electronic digital computers—Evaluation.

Computer arithmetic and logic units.

Computer storage devices.

Memory management (Computer science).

Electronic circuits.

Logic Design.

Processor Architectures.

System Performance and Evaluation.

Arithmetic and Logic Structures.

Computer Memory Structure.

Electronic Circuits and Systems.

Lisätiedot

edited by Nadine Azemard, Lars Svensson

Pääsarja

Lecture Notes in Computer Science

Muu ilmiasu

3-540-74441-X

Bibliografia

Includes bibliographical references and index.

ISBN

3-540-74442-8

DOI

10.1007/978-3-540-74442-9

Standarditunnukset

doi 10.1007/978-3-540-74442-9

Huomautus kielistä

English

Hae kokoteksti

Saatavuustiedot

Sisällysluettelo

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Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings

Azemard, Nadine

Svensson, Lars

Logic design.

Microprocessors.

Computer architecture.

Electronic digital computers—Evaluation.

Computer arithmetic and logic units.

Computer storage devices.

Memory management (Computer science).

Electronic circuits.

Logic Design.

Processor Architectures.

System Performance and Evaluation.

Arithmetic and Logic Structures.

Computer Memory Structure.

Electronic Circuits and Systems.

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Tämän aineiston tarjoaa

Haku

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings

Azemard, Nadine

Svensson, Lars

Logic design.

Microprocessors.

Computer architecture.

Electronic digital computers—Evaluation.

Computer arithmetic and logic units.

Computer storage devices.

Memory management (Computer science).

Electronic circuits.

Logic Design.

Processor Architectures.

System Performance and Evaluation.

Arithmetic and Logic Structures.

Computer Memory Structure.

Electronic Circuits and Systems.

Tämän aineiston tarjoaa

Tämän aineiston tarjoaa